Ettus

This forum is an archive for the mailing list usrp-users-request@lists.ettus.com (more options) Messages posted here will be sent to this mailing list.
1 ... 58596061626364
Topics (2233)
Replies Last Post Views
[USRP-users] How to know if a radio is currently in use? by Neel Pandeya via USR...
2
by Neel Pandeya via USR...
[USRP-users] UnsatisfiedLinkError: no jniDeviceAddress in java.library.path by Neel Pandeya via USR...
5
by Neel Pandeya via USR...
[USRP-users] E310 FPGA design_Loopback test by Neel Pandeya via USR...
1
by Neel Pandeya via USR...
[USRP-users] E310 Clock Synchronization with internal GPS by Neel Pandeya via USR...
5
by Neel Pandeya via USR...
[USRP-users] Unable to create Vivado projekt or to build clean repo by Neel Pandeya via USR...
5
by Neel Pandeya via USR...
[USRP-users] Problem about LiveUSB SDR installation by Neel Pandeya via USR...
1
by Neel Pandeya via USR...
[USRP-users] External power to the B200 by Neel Pandeya via USR...
1
by Neel Pandeya via USR...
Re: [USRP-users] E310 and USB Serial Port by Neel Pandeya via USR...
1
by Neel Pandeya via USR...
[USRP-users] Where can I find a tutorial on how to use the MPSK SNR Estimator? by Neel Pandeya via USR...
3
by Neel Pandeya via USR...
[USRP-users] 4 Rx RF Daughterboard by Neel Pandeya via USR...
1
by Neel Pandeya via USR...
[USRP-users] Compiling FPGA Source for B210 by Neel Pandeya via USR...
6
by Neel Pandeya via USR...
[USRP-users] Fwd: Angle of Arrival Measurements by Neel Pandeya via USR...
12
by Neel Pandeya via USR...
[USRP-users] Issue with E310 device address by Neel Pandeya via USR...
4
by Neel Pandeya via USR...
[USRP-users] Network Connectivity problem about USRP X310 by Neel Pandeya via USR...
9
by Neel Pandeya via USR...
[USRP-users] E310 FPGA design_Loopback test by Neel Pandeya via USR...
0
by Neel Pandeya via USR...
Re: [USRP-users] Time Alignment Error Across Multiple B200s with 10MHz/1PPS by Neel Pandeya via USR...
0
by Neel Pandeya via USR...
[USRP-users] N210 w/ UBX Bursting Issue by Neel Pandeya via USR...
2
by Neel Pandeya via USR...
[USRP-users] X310 Timeout Error while Updating FPGA by Neel Pandeya via USR...
4
by Neel Pandeya via USR...
[USRP-users] [UHD] 3.9.4-RC1 by Neel Pandeya via USR...
1
by Neel Pandeya via USR...
[USRP-users] RFNoC Polyphase Filterbank Channelizer / Synthesizer by Neel Pandeya via USR...
1
by Neel Pandeya via USR...
[USRP-users] Installing UHD for E310 by Neel Pandeya via USR...
2
by Neel Pandeya via USR...
[USRP-users] E310 FPGA design_Loopback test by Neel Pandeya via USR...
0
by Neel Pandeya via USR...
[USRP-users] update E310 sdcard by Neel Pandeya via USR...
2
by Neel Pandeya via USR...
[USRP-users] b200mini: using GPIO pin for PPS reference (re-send) by Neel Pandeya via USR...
6
by Neel Pandeya via USR...
[USRP-users] UHD Updating Question by Neel Pandeya via USR...
12
by Neel Pandeya via USR...
[USRP-users] USRP B210 External reference selection by Neel Pandeya via USR...
1
by Neel Pandeya via USR...
[USRP-users] Which part manages USRP N210 CRC ? by Neel Pandeya via USR...
8
by Neel Pandeya via USR...
[USRP-users] AssertionError: accum_timeout <_timeout by Neel Pandeya via USR...
9
by Neel Pandeya via USR...
Re: [USRP-users] E310 : Interfacing ZynQ 7020 with AD 9361 RFIC and Filter Banks by Neel Pandeya via USR...
4
by Neel Pandeya via USR...
[USRP-users] USRP entry level materia by Neel Pandeya via USR...
2
by Neel Pandeya via USR...
[USRP-users] building a MIMO system without PPS signal by Neel Pandeya via USR...
6
by Neel Pandeya via USR...
[USRP-users] Internal clock rate on the E310. Is it adjustable? Is there any way to add processing power to the E310 FPGA? by Neel Pandeya via USR...
1
by Neel Pandeya via USR...
[USRP-users] b200mini: using GPIO pin for PPS reference by Neel Pandeya via USR...
0
by Neel Pandeya via USR...
[USRP-users] External reference for USRP2 by Neel Pandeya via USR...
4
by Neel Pandeya via USR...
[USRP-users] Loopback of RFNoC version by Neel Pandeya via USR...
1
by Neel Pandeya via USR...
1 ... 58596061626364